0C — Connectors → Kernel → Silicon (one substrate)
Connectors (ports). Compact verbs that mirror real operations and map cleanly to hardware ports: s_sum, s_add, s_sub, s_mul, s_div, s_pow, s_unary; comparisons (s_gt, s_eq) emit numeric scores/bands without altering m; an alignment-only gate can scale a while leaving m untouched.
Kernel (math). Three-stage pipe:
- Clamp/Map:
a_c := clamp(a, -1+eps_a, +1-eps_a);u := atanh(a_c) - Compose in u: add/sub/scale (e.g., mul/div lanes via
u' = u1 ± u2) - Inverse/Bound:
a' := tanh(u'); re-clamp before publish
Silicon (blocks).
• SSM-ALU: lane ops (map/compose/inverse) in fixed-point; LUTs for tanh/atanh.
• SSACC: tiny streaming accumulator exposing {U,W} with guarded divide for U/W.
• Buses: magnitude M-BUS and confidence A-BUS/U-BUS in lockstep; publish rounding only at I/O boundaries to preserve determinism.
0D — Immediate value (why this helps now)
- Backward-compatible. Classical code stays untouched; collapse parity holds:
phi((m,a)) = m. - Order-invariant streaming. Batch, stream, or shuffled inputs yield the same lane:
a_out := tanh(U / max(W, eps_w))withU += w*atanh(a),W += w. - Near-singularity stability. Divides and low-signal regimes remain bounded and interpretable; the lane exposes fragility without exploding magnitudes.
- One kernel, many domains. Works uniformly across control, sensing, inference, networking, analytics, etc.
- Deterministic QA. Frozen knobs and calculator-checkable identities give crisp PASS/WARN/FAIL gates for bring-up and audits.
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